Hardik's email address and phone number have been validated.
Hardik
- Rate ₹500
- Response 1h
-
Students3
Number of students accompanied by Hardik since their arrival at Superprof
Number of students accompanied by Hardik since their arrival at Superprof
₹500/hr
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- Professional coaching
Learn ASIC Verification from Experienced Verification Engineer from Industry, with sound Knowledge and skills of UVM, System Verilog, Verilog, Linux and Perl
- Professional coaching
Class location
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At Hardik 's house : Ahmedabad
- Online
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at your home or a public place : will travel up to 10 km from Ahmedabad
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About Hardik
I am an ASIC Verification Engineer with 1.5 years of professional experience.
I am having experience of Verifying Complex System on Chip with Processor and various IPs. I used to write different test-cases for SoC Connectivity, Register Access, Glue Logic Verification etc. for different System on chips (SoC).
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About the class
- Classes 1 to 5
- Classes 6 to 8
- Class 10
- +19
levels :
Classes 1 to 5
Classes 6 to 8
Class 10
Classes 11 & 12
Class 12
BTech
Adult Literacy
Undergraduate
Masters
PG Diploma
PhD
Other
Graduate Diploma in Law
Qualified Lawyer Transfer Scheme
MBA
Kindergarten (LKG, UKG)
Beginner
Intermediate
Advanced
Professional
Others
Children
- English
- Hindi
- Gujarati
All languages in which the class is available :
English
Hindi
Gujarati
Apart from Industrial Experience, I am also having teaching Experience at university level which helps me to deliver the sessions with ease and lucid manner.
I usually deliver the sessions for following topics.
Linux (basic commands,directory structure, use of grep, sed, awk etc.)
Perl Scripting (basics of Perl, How to Develop Automatic Testcases using Perl Scripts)
Verilog (Verilog HDL code development starting for small RTLs than growing gradually to big RTLs, FSMs, FIFO, Arbiter, Traffic Light Controllers, AMBA AHB bus protocol)
System Verilog (Basic Data Structures like, Array, queue, associative array, Basic Data types like reg, wire, logic,Basics of OOPs concepts like parent class,child class, polymorphism,Inheritance,Encapsulation, Abstract class, Randomization, coverage, Environment Building which includes creation and proper connection of Agent, scoreboard, DUT, Interfaces etc., writing assertions)
UVM (Basic structure of UVM,Components vs objects, Phases,Factory registration,Verbosity,Interfaces, Conffig DB, Resource DB)
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Rates
Rate
- ₹500
Pack prices
- 5h: ₹2500
- 10h: ₹5000
online
- ₹500/hr
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